[1] | 1 | /* |
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| 2 | ----------------------------------------------------------------------------- |
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| 3 | This source file is part of OGRE |
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| 4 | (Object-oriented Graphics Rendering Engine) |
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| 5 | For the latest info, see http://www.ogre3d.org/ |
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| 6 | |
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| 7 | Copyright (c) 2000-2006 Torus Knot Software Ltd |
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| 8 | Also see acknowledgements in Readme.html |
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| 9 | |
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| 10 | This program is free software; you can redistribute it and/or modify it under |
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| 11 | the terms of the GNU Lesser General Public License as published by the Free Software |
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| 12 | Foundation; either version 2 of the License, or (at your option) any later |
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| 13 | version. |
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| 14 | |
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| 15 | This program is distributed in the hope that it will be useful, but WITHOUT |
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| 16 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS |
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| 17 | FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public License for more details. |
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| 18 | |
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| 19 | You should have received a copy of the GNU Lesser General Public License along with |
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| 20 | this program; if not, write to the Free Software Foundation, Inc., 59 Temple |
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| 21 | Place - Suite 330, Boston, MA 02111-1307, USA, or go to |
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| 22 | http://www.gnu.org/copyleft/lesser.txt. |
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| 23 | |
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| 24 | You may alternatively use this source under the terms of a specific version of |
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| 25 | the OGRE Unrestricted License provided you have obtained such a license from |
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| 26 | Torus Knot Software Ltd. |
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| 27 | ----------------------------------------------------------------------------- |
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| 28 | */ |
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| 29 | #include "OgreStableHeaders.h" |
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| 30 | |
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| 31 | #include "OgrePlatformInformation.h" |
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| 32 | #include "OgreLog.h" |
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| 33 | #include "OgreStringConverter.h" |
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| 34 | |
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| 35 | #if OGRE_COMPILER == OGRE_COMPILER_MSVC |
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| 36 | #include <excpt.h> // For SEH values |
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| 37 | #if _MSC_VER >= 1400 |
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| 38 | #include <intrin.h> |
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| 39 | #endif |
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| 40 | #elif OGRE_COMPILER == OGRE_COMPILER_GNUC |
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| 41 | #include <signal.h> |
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| 42 | #include <setjmp.h> |
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| 43 | |
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| 44 | #endif |
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| 45 | |
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| 46 | // Yes, I known, this file looks very ugly, but there hasn't other ways to do it better. |
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| 47 | |
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| 48 | namespace Ogre { |
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| 49 | |
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| 50 | #if OGRE_CPU == OGRE_CPU_X86 |
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| 51 | |
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| 52 | //--------------------------------------------------------------------- |
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| 53 | // Struct for store CPUID instruction result, compiler-independent |
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| 54 | //--------------------------------------------------------------------- |
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| 55 | struct CpuidResult |
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| 56 | { |
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| 57 | // Note: DO NOT CHANGE THE ORDER, some code based on that. |
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| 58 | uint _eax; |
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| 59 | uint _ebx; |
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| 60 | uint _edx; |
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| 61 | uint _ecx; |
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| 62 | }; |
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| 63 | |
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| 64 | //--------------------------------------------------------------------- |
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| 65 | // Compiler-dependent routines |
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| 66 | //--------------------------------------------------------------------- |
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| 67 | |
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| 68 | #if OGRE_COMPILER == OGRE_COMPILER_MSVC |
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| 69 | #pragma warning(push) |
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| 70 | #pragma warning(disable: 4035) // no return value |
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| 71 | #endif |
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| 72 | |
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| 73 | //--------------------------------------------------------------------- |
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| 74 | // Detect whether CPU supports CPUID instruction, returns non-zero if supported. |
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| 75 | static int _isSupportCpuid(void) |
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| 76 | { |
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| 77 | #if OGRE_COMPILER == OGRE_COMPILER_MSVC |
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| 78 | // Visual Studio 2005 & 64-bit compilers always supports __cpuid intrinsic |
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| 79 | // note that even though this is a build rather than runtime setting, all |
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| 80 | // 64-bit CPUs support this so since binary is 64-bit only we're ok |
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| 81 | #if _MSC_VER >= 1400 && defined(_M_X64) |
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| 82 | return true; |
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| 83 | #else |
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| 84 | // If we can modify flag register bit 21, the cpu is supports CPUID instruction |
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| 85 | __asm |
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| 86 | { |
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| 87 | // Read EFLAG |
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| 88 | pushfd |
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| 89 | pop eax |
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| 90 | mov ecx, eax |
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| 91 | |
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| 92 | // Modify bit 21 |
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| 93 | xor eax, 0x200000 |
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| 94 | push eax |
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| 95 | popfd |
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| 96 | |
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| 97 | // Read back EFLAG |
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| 98 | pushfd |
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| 99 | pop eax |
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| 100 | |
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| 101 | // Restore EFLAG |
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| 102 | push ecx |
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| 103 | popfd |
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| 104 | |
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| 105 | // Check bit 21 modifiable |
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| 106 | xor eax, ecx |
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| 107 | neg eax |
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| 108 | sbb eax, eax |
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| 109 | |
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| 110 | // Return values in eax, no return statment requirement here for VC. |
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| 111 | } |
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| 112 | #endif |
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| 113 | #elif OGRE_COMPILER == OGRE_COMPILER_GNUC |
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| 114 | unsigned oldFlags, newFlags; |
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| 115 | __asm__ |
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| 116 | ( |
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| 117 | "pushfl \n\t" |
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| 118 | "pop %0 \n\t" |
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| 119 | "mov %0, %1 \n\t" |
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| 120 | "xor %2, %0 \n\t" |
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| 121 | "push %0 \n\t" |
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| 122 | "popfl \n\t" |
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| 123 | "pushfl \n\t" |
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| 124 | "pop %0 \n\t" |
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| 125 | "push %1 \n\t" |
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| 126 | "popfl \n\t" |
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| 127 | : "=r" (oldFlags), "=r" (newFlags) |
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| 128 | : "n" (0x200000) |
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| 129 | ); |
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| 130 | return oldFlags != newFlags; |
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| 131 | |
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| 132 | #else |
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| 133 | // TODO: Supports other compiler |
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| 134 | return false; |
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| 135 | #endif |
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| 136 | } |
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| 137 | |
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| 138 | //--------------------------------------------------------------------- |
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| 139 | // Performs CPUID instruction with 'query', fill the results, and return value of eax. |
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| 140 | static uint _performCpuid(int query, CpuidResult& result) |
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| 141 | { |
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| 142 | #if OGRE_COMPILER == OGRE_COMPILER_MSVC |
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| 143 | #if _MSC_VER >= 1400 |
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| 144 | int CPUInfo[4]; |
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| 145 | __cpuid(CPUInfo, query); |
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| 146 | result._eax = CPUInfo[0]; |
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| 147 | result._ebx = CPUInfo[1]; |
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| 148 | result._ecx = CPUInfo[2]; |
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| 149 | result._edx = CPUInfo[3]; |
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| 150 | return result._eax; |
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| 151 | #else |
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| 152 | __asm |
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| 153 | { |
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| 154 | mov edi, result |
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| 155 | mov eax, query |
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| 156 | cpuid |
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| 157 | mov [edi]._eax, eax |
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| 158 | mov [edi]._ebx, ebx |
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| 159 | mov [edi]._edx, edx |
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| 160 | mov [edi]._ecx, ecx |
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| 161 | // Return values in eax, no return statment requirement here for VC. |
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| 162 | } |
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| 163 | #endif |
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| 164 | #elif OGRE_COMPILER == OGRE_COMPILER_GNUC |
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| 165 | __asm__ |
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| 166 | ( |
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| 167 | "pushl %%ebx \n\t" |
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| 168 | "cpuid \n\t" |
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| 169 | "movl %%ebx, %%edi \n\t" |
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| 170 | "popl %%ebx \n\t" |
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| 171 | : "=a" (result._eax), "=D" (result._ebx), "=c" (result._ecx), "=d" (result._edx) |
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| 172 | : "a" (query) |
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| 173 | ); |
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| 174 | return result._eax; |
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| 175 | |
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| 176 | #else |
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| 177 | // TODO: Supports other compiler |
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| 178 | return 0; |
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| 179 | #endif |
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| 180 | } |
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| 181 | |
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| 182 | #if OGRE_COMPILER == OGRE_COMPILER_MSVC |
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| 183 | #pragma warning(pop) |
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| 184 | #endif |
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| 185 | |
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| 186 | //--------------------------------------------------------------------- |
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| 187 | // Detect whether or not os support Streaming SIMD Extension. |
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| 188 | #if OGRE_COMPILER == OGRE_COMPILER_GNUC |
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| 189 | static jmp_buf sIllegalJmpBuf; |
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| 190 | static void _illegalHandler(int x) |
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| 191 | { |
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| 192 | (void)(x); // Unused |
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| 193 | longjmp(sIllegalJmpBuf, 1); |
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| 194 | } |
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| 195 | #endif |
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| 196 | static bool _checkOperatingSystemSupportSSE(void) |
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| 197 | { |
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| 198 | #if OGRE_COMPILER == OGRE_COMPILER_MSVC |
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| 199 | /* |
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| 200 | The FP part of SSE introduces a new architectural state and therefore |
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| 201 | requires support from the operating system. So even if CPUID indicates |
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| 202 | support for SSE FP, the application might not be able to use it. If |
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| 203 | CPUID indicates support for SSE FP, check here whether it is also |
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| 204 | supported by the OS, and turn off the SSE FP feature bit if there |
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| 205 | is no OS support for SSE FP. |
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| 206 | |
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| 207 | Operating systems that do not support SSE FP return an illegal |
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| 208 | instruction exception if execution of an SSE FP instruction is performed. |
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| 209 | Here, a sample SSE FP instruction is executed, and is checked for an |
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| 210 | exception using the (non-standard) __try/__except mechanism |
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| 211 | of Microsoft Visual C/C++. |
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| 212 | */ |
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| 213 | // Visual Studio 2005, Both AMD and Intel x64 support SSE |
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| 214 | // note that even though this is a build rather than runtime setting, all |
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| 215 | // 64-bit CPUs support this so since binary is 64-bit only we're ok |
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| 216 | #if _MSC_VER >= 1400 && defined(_M_X64) |
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| 217 | return true; |
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| 218 | #else |
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| 219 | __try |
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| 220 | { |
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| 221 | __asm orps xmm0, xmm0 |
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| 222 | return true; |
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| 223 | } |
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| 224 | __except(EXCEPTION_EXECUTE_HANDLER) |
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| 225 | { |
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| 226 | return false; |
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| 227 | } |
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| 228 | #endif |
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| 229 | #elif OGRE_COMPILER == OGRE_COMPILER_GNUC |
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| 230 | // Does gcc have __try/__except similar mechanism? |
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| 231 | // Use signal, setjmp/longjmp instead. |
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| 232 | void (*oldHandler)(int); |
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| 233 | oldHandler = signal(SIGILL, _illegalHandler); |
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| 234 | |
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| 235 | if (setjmp(sIllegalJmpBuf)) |
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| 236 | { |
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| 237 | signal(SIGILL, oldHandler); |
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| 238 | return false; |
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| 239 | } |
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| 240 | else |
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| 241 | { |
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| 242 | __asm__ __volatile__ ("orps %xmm0, %xmm0"); |
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| 243 | signal(SIGILL, oldHandler); |
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| 244 | return true; |
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| 245 | } |
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| 246 | |
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| 247 | #else |
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| 248 | // TODO: Supports other compiler, assumed is supported by default |
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| 249 | return true; |
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| 250 | #endif |
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| 251 | } |
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| 252 | |
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| 253 | //--------------------------------------------------------------------- |
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| 254 | // Compiler-independent routines |
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| 255 | //--------------------------------------------------------------------- |
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| 256 | |
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| 257 | static uint queryCpuFeatures(void) |
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| 258 | { |
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| 259 | #define CPUID_STD_FPU (1<<0) |
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| 260 | #define CPUID_STD_TSC (1<<4) |
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| 261 | #define CPUID_STD_CMOV (1<<15) |
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| 262 | #define CPUID_STD_MMX (1<<23) |
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| 263 | #define CPUID_STD_SSE (1<<25) |
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| 264 | #define CPUID_STD_SSE2 (1<<26) |
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| 265 | #define CPUID_STD_HTT (1<<28) // EDX[28] - Bit 28 set indicates Hyper-Threading Technology is supported in hardware. |
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| 266 | |
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| 267 | #define CPUID_STD_SSE3 (1<<0) // ECX[0] - Bit 0 of standard function 1 indicate SSE3 supported |
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| 268 | |
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| 269 | #define CPUID_FAMILY_ID_MASK 0x0F00 // EAX[11:8] - Bit 11 thru 8 contains family processor id |
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| 270 | #define CPUID_EXT_FAMILY_ID_MASK 0x0F00000 // EAX[23:20] - Bit 23 thru 20 contains extended family processor id |
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| 271 | #define CPUID_PENTIUM4_ID 0x0F00 // Pentium 4 family processor id |
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| 272 | |
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| 273 | #define CPUID_EXT_3DNOW (1<<31) |
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| 274 | #define CPUID_EXT_AMD_3DNOWEXT (1<<30) |
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| 275 | #define CPUID_EXT_AMD_MMXEXT (1<<22) |
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| 276 | |
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| 277 | uint features = 0; |
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| 278 | |
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| 279 | // Supports CPUID instruction ? |
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| 280 | if (_isSupportCpuid()) |
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| 281 | { |
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| 282 | CpuidResult result; |
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| 283 | |
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| 284 | // Has standard feature ? |
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| 285 | if (_performCpuid(0, result)) |
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| 286 | { |
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| 287 | // Check vendor strings |
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| 288 | if (memcmp(&result._ebx, "GenuineIntel", 12) == 0) |
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| 289 | { |
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| 290 | if (result._eax > 2) |
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| 291 | features |= PlatformInformation::CPU_FEATURE_PRO; |
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| 292 | |
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| 293 | // Check standard feature |
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| 294 | _performCpuid(1, result); |
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| 295 | |
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| 296 | if (result._edx & CPUID_STD_FPU) |
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| 297 | features |= PlatformInformation::CPU_FEATURE_FPU; |
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| 298 | if (result._edx & CPUID_STD_TSC) |
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| 299 | features |= PlatformInformation::CPU_FEATURE_TSC; |
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| 300 | if (result._edx & CPUID_STD_CMOV) |
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| 301 | features |= PlatformInformation::CPU_FEATURE_CMOV; |
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| 302 | if (result._edx & CPUID_STD_MMX) |
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| 303 | features |= PlatformInformation::CPU_FEATURE_MMX; |
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| 304 | if (result._edx & CPUID_STD_SSE) |
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| 305 | features |= PlatformInformation::CPU_FEATURE_MMXEXT | PlatformInformation::CPU_FEATURE_SSE; |
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| 306 | if (result._edx & CPUID_STD_SSE2) |
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| 307 | features |= PlatformInformation::CPU_FEATURE_SSE2; |
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| 308 | |
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| 309 | if (result._ecx & CPUID_STD_SSE3) |
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| 310 | features |= PlatformInformation::CPU_FEATURE_SSE3; |
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| 311 | |
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| 312 | // Check to see if this is a Pentium 4 or later processor |
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| 313 | if ((result._eax & CPUID_EXT_FAMILY_ID_MASK) || |
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| 314 | (result._eax & CPUID_FAMILY_ID_MASK) == CPUID_PENTIUM4_ID) |
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| 315 | { |
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| 316 | // Check hyper-threading technology |
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| 317 | if (result._edx & CPUID_STD_HTT) |
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| 318 | features |= PlatformInformation::CPU_FEATURE_HTT; |
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| 319 | } |
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| 320 | } |
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| 321 | else if (memcmp(&result._ebx, "AuthenticAMD", 12) == 0) |
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| 322 | { |
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| 323 | features |= PlatformInformation::CPU_FEATURE_PRO; |
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| 324 | |
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| 325 | // Check standard feature |
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| 326 | _performCpuid(1, result); |
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| 327 | |
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| 328 | if (result._edx & CPUID_STD_FPU) |
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| 329 | features |= PlatformInformation::CPU_FEATURE_FPU; |
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| 330 | if (result._edx & CPUID_STD_TSC) |
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| 331 | features |= PlatformInformation::CPU_FEATURE_TSC; |
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| 332 | if (result._edx & CPUID_STD_CMOV) |
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| 333 | features |= PlatformInformation::CPU_FEATURE_CMOV; |
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| 334 | if (result._edx & CPUID_STD_MMX) |
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| 335 | features |= PlatformInformation::CPU_FEATURE_MMX; |
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| 336 | if (result._edx & CPUID_STD_SSE) |
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| 337 | features |= PlatformInformation::CPU_FEATURE_SSE; |
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| 338 | if (result._edx & CPUID_STD_SSE2) |
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| 339 | features |= PlatformInformation::CPU_FEATURE_SSE2; |
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| 340 | |
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| 341 | if (result._ecx & CPUID_STD_SSE3) |
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| 342 | features |= PlatformInformation::CPU_FEATURE_SSE3; |
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| 343 | |
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| 344 | // Has extended feature ? |
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| 345 | if (_performCpuid(0x80000000, result) > 0x80000000) |
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| 346 | { |
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| 347 | // Check extended feature |
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| 348 | _performCpuid(0x80000001, result); |
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| 349 | |
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| 350 | if (result._edx & CPUID_EXT_3DNOW) |
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| 351 | features |= PlatformInformation::CPU_FEATURE_3DNOW; |
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| 352 | if (result._edx & CPUID_EXT_AMD_3DNOWEXT) |
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| 353 | features |= PlatformInformation::CPU_FEATURE_3DNOWEXT; |
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| 354 | if (result._edx & CPUID_EXT_AMD_MMXEXT) |
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| 355 | features |= PlatformInformation::CPU_FEATURE_MMXEXT; |
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| 356 | } |
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| 357 | } |
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| 358 | } |
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| 359 | } |
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| 360 | |
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| 361 | return features; |
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| 362 | } |
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| 363 | //--------------------------------------------------------------------- |
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| 364 | static uint _detectCpuFeatures(void) |
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| 365 | { |
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| 366 | uint features = queryCpuFeatures(); |
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| 367 | |
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| 368 | const uint sse_features = PlatformInformation::CPU_FEATURE_SSE | |
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| 369 | PlatformInformation::CPU_FEATURE_SSE2 | PlatformInformation::CPU_FEATURE_SSE3; |
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| 370 | if ((features & sse_features) && !_checkOperatingSystemSupportSSE()) |
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| 371 | { |
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| 372 | features &= ~sse_features; |
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| 373 | } |
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| 374 | |
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| 375 | return features; |
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| 376 | } |
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| 377 | //--------------------------------------------------------------------- |
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| 378 | static String _detectCpuIdentifier(void) |
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| 379 | { |
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| 380 | // Supports CPUID instruction ? |
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| 381 | if (_isSupportCpuid()) |
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| 382 | { |
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| 383 | CpuidResult result; |
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| 384 | uint nExIds; |
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| 385 | char CPUString[0x20]; |
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| 386 | char CPUBrandString[0x40]; |
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| 387 | |
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| 388 | StringUtil::StrStreamType detailedIdentStr; |
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| 389 | |
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| 390 | |
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| 391 | // Has standard feature ? |
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| 392 | if (_performCpuid(0, result)) |
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| 393 | { |
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| 394 | memset(CPUString, 0, sizeof(CPUString)); |
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| 395 | memset(CPUBrandString, 0, sizeof(CPUBrandString)); |
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| 396 | |
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| 397 | *((int*)CPUString) = result._ebx; |
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| 398 | *((int*)(CPUString+4)) = result._edx; |
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| 399 | *((int*)(CPUString+8)) = result._ecx; |
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| 400 | |
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| 401 | detailedIdentStr << CPUString; |
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| 402 | |
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| 403 | // Calling _performCpuid with 0x80000000 as the query argument |
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| 404 | // gets the number of valid extended IDs. |
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| 405 | nExIds = _performCpuid(0x80000000, result); |
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| 406 | |
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| 407 | for (uint i=0x80000000; i<=nExIds; ++i) |
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| 408 | { |
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| 409 | _performCpuid(i, result); |
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| 410 | |
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| 411 | // Interpret CPU brand string and cache information. |
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| 412 | if (i == 0x80000002) |
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| 413 | { |
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| 414 | memcpy(CPUBrandString + 0, &result._eax, sizeof(result._eax)); |
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| 415 | memcpy(CPUBrandString + 4, &result._ebx, sizeof(result._ebx)); |
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| 416 | memcpy(CPUBrandString + 8, &result._ecx, sizeof(result._ecx)); |
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| 417 | memcpy(CPUBrandString + 12, &result._edx, sizeof(result._edx)); |
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| 418 | } |
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| 419 | else if (i == 0x80000003) |
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| 420 | { |
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| 421 | memcpy(CPUBrandString + 16 + 0, &result._eax, sizeof(result._eax)); |
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| 422 | memcpy(CPUBrandString + 16 + 4, &result._ebx, sizeof(result._ebx)); |
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| 423 | memcpy(CPUBrandString + 16 + 8, &result._ecx, sizeof(result._ecx)); |
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| 424 | memcpy(CPUBrandString + 16 + 12, &result._edx, sizeof(result._edx)); |
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| 425 | } |
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| 426 | else if (i == 0x80000004) |
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| 427 | { |
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| 428 | memcpy(CPUBrandString + 32 + 0, &result._eax, sizeof(result._eax)); |
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| 429 | memcpy(CPUBrandString + 32 + 4, &result._ebx, sizeof(result._ebx)); |
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| 430 | memcpy(CPUBrandString + 32 + 8, &result._ecx, sizeof(result._ecx)); |
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| 431 | memcpy(CPUBrandString + 32 + 12, &result._edx, sizeof(result._edx)); |
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| 432 | } |
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| 433 | } |
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| 434 | |
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| 435 | String brand(CPUBrandString); |
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| 436 | StringUtil::trim(brand); |
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| 437 | if (!brand.empty()) |
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| 438 | detailedIdentStr << ": " << brand; |
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| 439 | |
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| 440 | return detailedIdentStr.str(); |
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| 441 | } |
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| 442 | } |
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| 443 | |
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| 444 | return "X86"; |
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| 445 | } |
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| 446 | |
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| 447 | #else // OGRE_CPU == OGRE_CPU_X86 |
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| 448 | |
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| 449 | //--------------------------------------------------------------------- |
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| 450 | static uint _detectCpuFeatures(void) |
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| 451 | { |
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| 452 | return 0; |
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| 453 | } |
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| 454 | //--------------------------------------------------------------------- |
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| 455 | static String _detectCpuIdentifier(void) |
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| 456 | { |
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| 457 | return "Unknown"; |
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| 458 | } |
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| 459 | |
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| 460 | #endif // OGRE_CPU |
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| 461 | |
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| 462 | //--------------------------------------------------------------------- |
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| 463 | // Platform-independent routines, but the returns value are platform-dependent |
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| 464 | //--------------------------------------------------------------------- |
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| 465 | |
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| 466 | const String& PlatformInformation::getCpuIdentifier(void) |
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| 467 | { |
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| 468 | static const String sIdentifier = _detectCpuIdentifier(); |
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| 469 | return sIdentifier; |
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| 470 | } |
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| 471 | //--------------------------------------------------------------------- |
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| 472 | uint PlatformInformation::getCpuFeatures(void) |
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| 473 | { |
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| 474 | static const uint sFeatures = _detectCpuFeatures(); |
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| 475 | return sFeatures; |
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| 476 | } |
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| 477 | //--------------------------------------------------------------------- |
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| 478 | bool PlatformInformation::hasCpuFeature(CpuFeatures feature) |
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| 479 | { |
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| 480 | return (getCpuFeatures() & feature) != 0; |
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| 481 | } |
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| 482 | //--------------------------------------------------------------------- |
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| 483 | void PlatformInformation::log(Log* pLog) |
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| 484 | { |
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| 485 | pLog->logMessage("CPU Identifier & Features"); |
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| 486 | pLog->logMessage("-------------------------"); |
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| 487 | pLog->logMessage( |
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| 488 | " * CPU ID: " + getCpuIdentifier()); |
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| 489 | #if OGRE_CPU == OGRE_CPU_X86 |
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| 490 | if(_isSupportCpuid()) |
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| 491 | { |
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| 492 | pLog->logMessage( |
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| 493 | " * SSE: " + StringConverter::toString(hasCpuFeature(CPU_FEATURE_SSE), true)); |
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| 494 | pLog->logMessage( |
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| 495 | " * SSE2: " + StringConverter::toString(hasCpuFeature(CPU_FEATURE_SSE2), true)); |
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| 496 | pLog->logMessage( |
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| 497 | " * SSE3: " + StringConverter::toString(hasCpuFeature(CPU_FEATURE_SSE3), true)); |
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| 498 | pLog->logMessage( |
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| 499 | " * MMX: " + StringConverter::toString(hasCpuFeature(CPU_FEATURE_MMX), true)); |
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| 500 | pLog->logMessage( |
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| 501 | " * MMXEXT: " + StringConverter::toString(hasCpuFeature(CPU_FEATURE_MMXEXT), true)); |
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| 502 | pLog->logMessage( |
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| 503 | " * 3DNOW: " + StringConverter::toString(hasCpuFeature(CPU_FEATURE_3DNOW), true)); |
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| 504 | pLog->logMessage( |
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| 505 | " * 3DNOWEXT: " + StringConverter::toString(hasCpuFeature(CPU_FEATURE_3DNOWEXT), true)); |
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| 506 | pLog->logMessage( |
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| 507 | " * CMOV: " + StringConverter::toString(hasCpuFeature(CPU_FEATURE_CMOV), true)); |
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| 508 | pLog->logMessage( |
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| 509 | " * TSC: " + StringConverter::toString(hasCpuFeature(CPU_FEATURE_TSC), true)); |
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| 510 | pLog->logMessage( |
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| 511 | " * FPU: " + StringConverter::toString(hasCpuFeature(CPU_FEATURE_FPU), true)); |
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| 512 | pLog->logMessage( |
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| 513 | " * PRO: " + StringConverter::toString(hasCpuFeature(CPU_FEATURE_PRO), true)); |
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| 514 | pLog->logMessage( |
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| 515 | " * HT: " + StringConverter::toString(hasCpuFeature(CPU_FEATURE_HTT), true)); |
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| 516 | } |
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| 517 | #endif |
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| 518 | pLog->logMessage("-------------------------"); |
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| 519 | |
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| 520 | } |
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| 521 | |
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| 522 | |
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| 523 | } |
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